1. Field of the Invention
The present invention relates to vertical cavity surface emitting lasers (VCSELs), and more particularly to VCSELs with reduced mechanical stress to improve reliability and performance.
2. The Background Art
Vertical-cavity surface-emitting lasers (VCSELs) have become the laser technology of choice for transceivers used in Storage-Area Network (SAN) and Local Area Network (LAN) applications. A typical VCSEL configuration includes an active region between two mirrors disposed one over another on the surface of the substrate wafer. An insulating region between the mirrors forces the current to flow through a small aperture, and the device lases perpendicular to the wafer surface (i.e., the “vertical” part of VCSEL).
There are two major technology platforms for manufacturing VCSELs. The difference in these platforms is based on the different techniques of current confinement, either by ion-implantation or by selective oxidation. In the ion implantation technique, protons are implanted in the semiconductor structure so as to form a high resistance region, thereby confining the current flow to a defined region. In the selective oxidation technique, the peripheral region of a mesa structure is oxidized, thereby defining an aperture surrounded by a high resistance region.
More particularly, in the selective oxidation method, after depositing an AlGaAs layer on a lower portion of an upper reflector, which is to be a high-resistance region, the resultant structure is etched, resulting in individual VCSELs on a wafer. Next, the wafer is left in an oxidation atmosphere for a predetermined period of time, to allow diffusion of vapor into the peripheral portion of the AlGaAs layer. As a result, an oxide insulating layer is formed at the peripheral portion as the high-resistance region, which limits flow of current, thereby resulting in an aperture surrounded by the high-resistance region.
The oxidative diffusion rate in forming an aperture of a VCSEL is highly sensitive to the temperature of the furnace used in the oxidizing diffusion, oxidation time and the amount of oxygen supplied into the furnace. A variation in the diffusion rate is a serious problem in mass production that requires high repeatability, and in forming a particular size of the aperture.
The implanted VCSELs have been proven very reliable. However, the operating speed of the implanted VCSELs usually limits their use to applications requiring less than 2 Gb/sec operating speed. Oxide VCSELs provide many superior properties of VCSEL performance including higher speed (demonstrated greater than 23 Gb/sec) and higher efficiency.
A typical VCSEL configuration includes epitaxial layers forming the active region and the two mirrors. The formation of the active region and the two mirrors involves using layers having differing aluminum compositions, which oxidize from the edge in differing distances, creating non-homogeneous layers within the side walls of the structure. This introduces stresses into the semiconductor structure. Such stress can result in failure of VCSEL devices. It has been found that a particular cause of failure of oxide VCSELs is the stress caused by this oxidation process.
Further, after fabrication of a VCSEL, hermetic sealing is required to avoid degradation of the semiconductor material as a result of exposure to the atmosphere. Previously, this has been done by mounting the VCSEL in a hermetic package, such as a TO can, or by applying a passivation layer over the surface of the semiconductor structure. U.S. Patent Application 2009/0041074, the whole contents of which are hereby incorporated by reference, discusses covering an epitaxial stack of a VCSEL with a passivation layer including a plurality of sublayers, at least some of which may be of different materials. At least two of the sublayers have opposing stresses and are disposed to reduce a net stress of the passivation layer in order to increase the mean time before the VCSEL fails.
As discussed in US 2007/0217472, the whole contents of which are hereby incorporated by reference, the electromagnetic wave propagation design of current commercially available 10 Gb/s VCSEL is single mode in the longitudinal or growth direction (z-axis) and multi-mode in the transverse or perpendicular to the growth direction (r-plane). Along the z-axis, the active semiconductor layer thicknesses are designed so that only a single optical mode couples to the laser gain peak. In the r-plane, the allowed transverse modes are determined by the size of the oxide aperture. Another factor determining the allowed transverse modes is that there is a gradual drop in the average refractive index of the layer of approximately 5% in a radial direction from the center of the mesa due the oxide aperture. This change in refractive index leads to index guiding of the transverse modes.
US 2007/0217472 proposes introducing a recessed portion or divot through the center of one of the two mirror stacks. In this way, optical modes which have a power density which is concentrated in the center of the mesa (e.g. the transverse optical modes P11, P13 and P31) are suppressed, resulting in an improvement of the spectral width characteristic of the VCSEL.